Summary The Scalable Serdes Framer Interface (SFI-S) is an Optical Internetworking Forum (OIF)

other designated brands included herein are trademarks of Xilinx in the United States and other countries. AMBA and ARM are registered trademarks of ARM in the EU and other countries. All other trademarks are the property of their respective owners. Summary The Scalable Serdes Framer Interface (SFI-S) is an Optical Internetworking Forum (OIF) standard that defines the electrical connections between devices on a typical optical communications line card. An n-bit wide SFI-S configuration contains n data channels and one control channel for interface skew compensation. This application note describes a ten data channel SFI-S design targeting Xilinx 7 series FPGAs using GTX or GTH serial transceivers to implement an aggregate 111.8 Gb/s bidirectional interface. The hardware-verified Verilog HDL reference design provides significant skew compensation and fine-grained control of skew tracking. A synthesizable example design with PRBS31 generator and checker logic enables simple simulation and hardware demonstration of the reference design.